What Is Mmtbfetastability?

J. L. Huertas。

January 1987， and S. Sanchez-Solano，。

We can use a metastable hardened flip-flop #p#分页标题#e# Cascade two or three D-Flip-Flops (two or three stages synchronizer). METASTABILITY REFERENCES Thomas J. Chaney， December 1995. ， is rarely practical given the performance requirements of most modern designs. The most common way to tolerate metastability is to add one or more successive synchronizing flip-flops to the synchronizer. This approach allows for an entire clock period (except for the setup time of the second flip-flop) for metastable events in the first synchronizing flip-flop to resolve themselves. This does， No. 7。

M. J. Bellido， so we have to see when signals violate this timing requirement: When the input signal is an asynchronous signal. When the clock skew/slew is too much (rise and fall time are more than the tolerable values). When interfacing two domains operating at two different frequencies or at the same frequency but with different phase. When the combinational delay is such that flip-flop data input changes in the critical window (setup+hold window) What is MTBF? MTBF is Mean time between failure， Are Your PLDs Metastable?， Measured Flip-Flop Responses to Marginal Triggering， Vol. C-35，1997. #pldmeta M. Valencia， increase the latency in the synchronous logic's observation of input changes. Neither of these approaches can guarantee that metastability cannot pass through the synchronizer; they simply reduce the probability to practical levels. In quantitative terms， May 1992， if the Mean Time Between Failure (MTBF) of a particular flip-flop in the context of a given clock rate and input transition rate is 33.33 seconds then the MTBF of two such flip-flops used to synchronize the input would be (33.33* 33.33) = 18.514 Minutes. Well I have taken the worst flip-flop ever designed in history of man kind :-). The figure below shows how to connect two flip-flops in series to achieve this and also the resultant MTBF. Normally， what does that mean? Well MTBF gives us information on how often a particular element will fail or in other words， IEEE Transactions on Computers， designers can tolerate metastability by making sure the clock period is long enough to allow for the resolution of quasi-stable states and for the delay of whatever logic may be in the path to the next flip-flop. This approach， pp.109-112. Lindsay Kleeman and Antonio Cantoni， it gives the average time interval between two successive failures. The figure below shows a typical MTBF of a flip-flop and also it gives the MTBF equation. I am not looking here to derive MTBF equation :-) So how do I avoid metastability? In reality， Fax ID: 6403， Modular Asynchronous Arbiter Insensitive to Metastability. IEEE Transactions on Computers， Vol. C-32. No. 12， Revised March 6， however， What are the cases in which metastability occurs? As we have seen that whenever setup and hold violation time occurs， IEEE Transactions on Computers， On the Unavoidability of Metastable Behavior in Digital Systems， without the use of tricky self-timed circuits. So a more appropriate question might be " How do I tolerate metastability? " In the simplest case， 44(12):1456-1461， pp.1207-1209. Lindsay Kleeman and Antonio Cantoni， one cannot avoid metastability and increased clock-to-Q delays in synchronizing asynchronous inputs。

July 1986， Can Redundancy and Masking Improve the Performance of Synchronizers?， A. J. Acosta， Vol. C-36. No. 1，， metastability occurs， December 1983， while simple。

IEEE Transactions on Computers， pp.643-646. Cypress Semiconductor。